Data image cache used in testing
US7257677B2 · kind B2 · utility
0Cited by
12References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2003 |
| Grant date | Aug 14, 2007 |
| Priority date | — |
| Expiry date | Jul 18, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/51
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a system and method of testing using a data image cache. An image server is coupled to one or more test beds to perform testing and/or debug operations on one or more components. Each test bed has one or more test slots to receive the one or more components. The test bed is preferably a motherboard. The motherboard may be in normal operation or may be placed in sleep mode during testing or debugging.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.