Memory system
US7257725B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2002 |
| Grant date | Aug 14, 2007 |
| Priority date | — |
| Expiry date | Mar 12, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4086
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clock is located at a position close to a plurality of memory modules connected to a memory controller and located away from the controller, and wiring is carried out so that read access is preferential for transmission of read data. With respect to write data, a delay amount corresponding to a round-trip propagation delay time to each of the modules is measured and writing of the write data is carried out while maintaining a known time relationship between the clock and data. To measure round-trip reflection, lines are wired between the modules and a location detection circuit in a 1:1 relationship, and the circuit measures a time taken from a signal output time of a driver having the same impedance as that of the wired lines to a reflected-wave reception time of a hysteresis receiver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.