Etching technique to planarize a multi-layer structure
US7259102B2 · kind B2 · utility
9Cited by
74References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2005 |
| Grant date | Aug 21, 2007 |
| Priority date | — |
| Expiry date | Oct 8, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02126
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a method of etching a multi-layer structure formed from a layer of a first material and a layer of a second material differing from the first material to obtain a desired degree of planarization. To that end, the method includes creating a first set of process conditions to etch the first material, generating a second set of process conditions to etch the second material; and establishing an additional set of process conditions to concurrently etch the first and second materials at substantially the same etch rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.