Clamping circuit
US7259609B2 · kind B2 · utility
5Cited by
7References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2003 |
| Grant date | Aug 21, 2007 |
| Priority date | — |
| Expiry date | Dec 1, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/72
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clamping circuit containing a transistor and a current amplifier. The transistor is designed to turn on when the voltage at a node exceeds (falls below) a specified upper (lower) level. The current amplifier is designed to draw substantial amount of current when the transistor is turned on to clamp the voltage at the node to the desired level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.