Scalable integrated circuit high density capacitors
US7259956B2 · kind B2 · utility
28Cited by
12References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2004 |
| Grant date | Aug 21, 2007 |
| Priority date | — |
| Expiry date | Mar 5, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides several scalable integrated circuit high density capacitors and their layout techniques. The capacitors are scaled, for example, by varying the number of metal layers and/or the area of the metal layers used to from the capacitors. The capacitors use different metallization patterns to form the metal layers, and different via patterns to couple adjacent metal layers. In embodiments, optional shields are included as the top-most and/or bottom-most layers of the capacitors, and/or as side shields, to reduce unwanted parasitic capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.