Germanium integrated CMOS wafer and method for manufacturing the same
US7262117B1 · kind B1 · utility
111Cited by
2References
37Claims
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Assignee
Inventors
Key dates
| Filing date | Feb 22, 2005 |
| Grant date | Aug 28, 2007 |
| Priority date | — |
| Expiry date | Feb 3, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/40
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention discloses an integration flow of germanium into a conventional CMOS process, with improvements in performing selective area growth, and implementing electrical contacts to the germanium, in a way that has minimal impact on the preexisting transistor devices. The present invention also provides methods to integrate the germanium without impacting the optical or electrical performance of these devices, except where intended, such as in a germanium photodetector, or germanium waveguide photodetector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.