Dry etching process for compound semiconductors
US7262137B2 · kind B2 · utility
0Cited by
6References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2004 |
| Grant date | Aug 28, 2007 |
| Priority date | — |
| Expiry date | Jan 4, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/30621
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Accordingly, this invention relates to an dry etching process for semiconductor wafers. More particularly, the present invention discloses a dry etching process including a halogen etchant (24) and a nitrogen gas (28) that selectively etches a compound semiconductor material (18) faster than the front-side metal layers (16A)(16B). Further, the dry etching process produces a vertical wall profile on compound semiconductor material (18) in both X (38) and Y (40) crystalline directions without undercutting the top of a via-opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.