Bias control for reducing amplifier power consumption and maintaining linearity
US7262657B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2005 |
| Grant date | Aug 28, 2007 |
| Priority date | — |
| Expiry date | Mar 21, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/411
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for biasing an amplifying device whereby the bias current tracks the input power or the power level of a control signal to thereby efficiently match the bias current with needs of the amplifying device. This method and apparatus overcomes the drawbacks of the prior art by biasing, not for maximum output power, but for the power level of the input signal or the control signal. In one embodiment a current conditioner operates in connection with the self adjusting biasing circuit to scale or adjust, potentially on an exponential basis, the biasing current for one or more amplifier stages. A cancellation current source may be configured within the bias circuit to cancel unneeded current to further minimize current consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.