Combined verification and compilation of bytecode
US7263693B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 17, 2004 |
| Grant date | Aug 28, 2007 |
| Priority date | — |
| Expiry date | Sep 13, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/449
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is a new method and apparatus to perform combined compilation and verification of platform independent bytecode instruction listings into optimized machine code. More specifically, the present invention creates a new method and apparatus in which bytecode compilation instructions are combined with bytecode verification instructions, producing optimized machine code on the target system in fewer programming steps than traditionally known. The new method, by combining the steps required for traditional bytecode verification and compilation, increases speed and applicability of platform independent bytecode instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.