Margin tracking cascode current mirror system and method
US7265628B2 · kind B2 · utility
4Cited by
3References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2005 |
| Grant date | Sep 4, 2007 |
| Priority date | — |
| Expiry date | Feb 18, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/262
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A margin tracking cascode current mirror system including a current mirror circuit having a current source device having a predetermined operating voltage for providing a current to a load, a cascode circuit interconnected between the current mirror and the load for controlling the output impedance of the system and for establishing a current control voltage, a cascode bias circuit for providing a forward bias to the cascode circuit, and a compound cascode bias circuit for independently controlling the slope and the offset of the current control voltage to track the predetermined operating voltage with a predetermined margin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.