Read enable generator for a turbo decoder deinterleaved symbol memory
US7266756B2 · kind B2 · utility
9Cited by
11References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2004 |
| Grant date | Sep 4, 2007 |
| Priority date | — |
| Expiry date | Sep 21, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/99943
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention concerns an apparatus comprising a first circuit, a second circuit and a third circuit. The first circuit may be configured to read a data signal in response to a read enable signal. The second circuit may be configured to generate the read enable signal. The third circuit may be configured to present the data signal in response to a first state of the read enable signal and present a predetermined value in response to a second state of the read enable signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.