System for and method of forming via holes by use of selective plasma etching in a continuous inline shadow mask deposition process
US7268431B2 · kind B2 · utility
1Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2004 |
| Grant date | Sep 11, 2007 |
| Priority date | — |
| Expiry date | Nov 17, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
In a shadow mask vapor deposition system, a first conductor is vapor deposited on a substrate and an insulator is vapor deposited on the first conductor. A second conductor is then vapor deposited on at least the insulator. The insulator layer is plasma etched either before or after the vapor deposition of the second conductor to define in the insulator layer a via hole through which at least a portion of the first conductor is exposed. An electrical connection is established between the first and second conductors by way of the via hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.