System for signal routing line aggregation in a field-programmable gate array
US7268585B1 · kind B1 · utility
3Cited by
3References
12Claims
0Family size
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Key dates
| Filing date | Dec 29, 2004 |
| Grant date | Sep 11, 2007 |
| Priority date | — |
| Expiry date | Dec 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17736
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An aggregation interconnect scheme for a programmable logic device provides low-skew routing of high fan-out signals by aggregating regional routing resources, which provide low-skew routing utilizing under-utilized global routing resources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.