Display device, driving circuit for the same and driving method for the same
US7268762B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2003 |
| Grant date | Sep 11, 2007 |
| Priority date | — |
| Expiry date | Dec 16, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a buffer that outputs an analog voltage Vout to be applied as a driving voltage to a pixel capacitance in a display region of an active-matrix liquid crystal display device, a CMOS circuit for generating this analog voltage includes four Pch transistors (QP0 to QP3) connected in parallel and four Nch transistors (QN0 to QN3) connected in parallel. When charging the pixel capacitance, a bias current is reduced and the driving capability is lowered by control with selector switches (SP1 to SP3) at a time at which the large driving capability at the beginning of the charging is not necessary anymore. And when discharging the charge that has accumulated at the pixel capacitance, the bias current is reduced and the driving capability is lowered by control with selector switches (SN1 to SN3) at a time at which the large driving capability at the beginning of the discharging is not necessary anymore. With this configuration, it is possible to reduce the power consumption of the output buffer applying the analog voltage for image display to the capacitive load in the display panel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.