Method for connecting circuit elements within an integrated circuit for reducing single-event upsets
US7269057B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2005 |
| Grant date | Sep 11, 2007 |
| Priority date | — |
| Expiry date | Dec 23, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/903
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for connecting circuit elements within an integrated circuit for reducing single-event upsets is disclosed. The integrated circuit includes a first and second circuit elements that are substantially identical to each other. In order to reduce the single-event upsets to the first and second circuit elements, each of the first and second circuit elements is divided into a first sub-element and a second sub-element. The first sub-element of the first circuit element is connected to the second sub-element of the second circuit element. The second sub-element of the first circuit element is connected to the first sub-element of the second circuit element. As a result, the nodal spacings between the sub-elements within the first and second circuit elements are effectively increased without demanding additional real estate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.