Patent · US Expired

PWM controller with integrated PLL

US7269217B2 · kind B2 · utility

2Cited by
15References
30Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 4, 2002
Grant dateSep 11, 2007
Priority date
Expiry dateNov 7, 2024

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/183
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A pulse-width modulation (PWM) controller to supply power to electronic components using a phase lock loop (PLL) is presented. A PWM controller comprises an input node operable to receive a reference signal and a phase-locked loop (PLL). The PLL comprises an oscillator operable to receive an error-correction signal and to generate an oscillator signal having a frequency that is related to the error-correction signal, a phase-frequency detector (PFD) coupled to the oscillator and operable to receive the reference signal and to generate the error-correction signal based upon a phase difference between the reference signal and a feedback signal, and a suppression circuit coupled to the PFD and operable to periodically enable the PFD to generate the error-correction signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.