Serial digital signal transmission apparatus
US7269225B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2003 |
| Grant date | Sep 11, 2007 |
| Priority date | — |
| Expiry date | Sep 3, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/4342
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A serial digital signal transmission apparatus can transmit HDTV digital serial signals with little jitter while utilizing the SRTS method. In the apparatus, parallel clocks are counted by an N counter to be supplied to the latch circuit, which latches the output count of a p-bit counter, RTSs are supplied from the latch circuit, as the result of comparison gated by a gate circuit is supplied to a PLL circuit and multiplied by N, parallel clocks of 74.25 MHz or 74.25/1.001 MHz, which are inputs to the N counter are regenerated (N is 8, 15 or 16), and transmitted data undergo parallel-to-serial conversion by a PS converter with these parallel clocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.