Trench insulation in substrate disks comprising logic semiconductors and power semiconductors
US7271074B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2003 |
| Grant date | Sep 18, 2007 |
| Priority date | — |
| Expiry date | Aug 6, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76286
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a layer arrangement (4b, 5b, 9b, 10, 9a, 5a, 4a) within an insulating trench, which insulates circuits with little distortion while being suitable for electrically insulating high-voltage power components (7) relative to low-voltage logic elements (6) that are integrated on the same chip (1, 2, 3). Also disclosed is the production of a sequence of alternating vertical layers in a trench (T). The electric strength for high voltages is improved while the influence of defects created by distortions of substrate disks is prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.