Providing decoupling capacitors in a circuit board
US7271348B1 · kind B1 · utility
2Cited by
16References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2003 |
| Grant date | Sep 18, 2007 |
| Priority date | — |
| Expiry date | Sep 25, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit board includes first and second reference plane layers. A first decoupling capacitor is mounted to a surface of the first reference plane layer, and a second decoupling capacitor is mounted to a surface of the second reference plane layer. Vias extend generally along a first direction through the circuit board. The first and second decoupling capacitors are aligned generally along the first direction to increase an amount of space through which the vias are extendable.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.