Pipelined converter systems with enhanced accuracy
US7271750B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 22, 2006 |
| Grant date | Sep 18, 2007 |
| Priority date | — |
| Expiry date | Jun 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/442
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Converter system embodiments are formed with signal-processing stages which include successive signal converters and a preceding signal sampler wherein all but a last one of the stages provides an output signal to a succeeding one of the stages and all of said signal converters generate a corresponding digital code. The system embodiments generally address a selected one of the stages and include controllers which are configured to process, at a process rate less than the system's sample rate, a digital error signal and the back-end digital code of back-end ones of signal converters that succeed the selected stage to thereby adjust at least one of the back-end digital code and a control voltage in the selected stage to enhance the accuracy of the system digital code. Once the processes of these embodiments have been applied to the selected stage, they may be successively applied to preceding stages. System embodiments are also directed to nonlinear amplifier gain by including approximations (e.g., piece-wise and polynomial approximations) of amplifier gain so that they are better directed to an amplifier gain that is appropriate for the signal that is being processed through the am…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.