Configuration aware pre-fetch switch setting by BIOS based on the number of CPUs and cache size
US7272710B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 30, 2004 |
| Grant date | Sep 18, 2007 |
| Priority date | — |
| Expiry date | Oct 3, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/601
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A default setting, associated with speculative transfers of information from a main memory to a cache memory, is selected for a system based on the number of CPUs and the size of instruction and/or data caches included in the system. A matrix relating the number of processors and the size of the memory caches may be stored in a system BIOS and used to aid in determining whether the speculative transfers should be enabled or disabled by default. In general, speculative transfers will be enabled by default if system performance is more likely than not to be enhanced by using speculative transfers. Speculative transfers will be disabled if system performance is likely to be degraded by use of speculative transfers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.