Dynamic bias circuit for a radio-frequency amplifier
US7274258B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 8, 2005 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Jan 4, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/294
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dynamic bias circuit for an RF amplifier is provided to overcome the drawbacks of conventional bias circuits. The dynamic bias circuit of the present invention is best used for an RF amplifier having an FET amplifying transistor. It automatically raises the DC bias point as the input power increases. As a result, the saturation of output power in the pinch-off region can be avoided. This dynamic bias circuit not only improves the operating characteristics of the RF amplifier, such as high operating efficiency and high-linearity output power, but also consumes zero power in its internal circuitry. Furthermore, it has a simple circuit structure with very few circuit components and a reduced chip area. It can thus be easily integrated into an amplifier to achieve a cost reduction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.