Digital signal receiver operating beyond the -3dB frequency
US7274756B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 17, 2002 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Jan 3, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0272
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver for digital data connects to a preceding signal path and the digital data has a lower to upper data frequency range. The receiver includes a received signal input terminal connected to a higher frequency gain circuit that shows highest transfer amplitude at the upper data frequency within the lower to upper data frequency range where the signal has been attenuated in its higher frequency components in the preceding signal path and providing an amplified signal at an amplified signal output terminal. The receiver further includes a latching circuit with two threshold levels, the latching circuit is connected with an input terminal to the amplified signal output terminal and an output terminal providing a digital output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.