Phase detector system with asynchronous output override
US7274764B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2003 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Dec 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1072
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention provides a phase-locked loop comprising a charge-pump loop filter and a phase detector system. The charge-pump loop filter is configured to provide a control voltage having a voltage level based on a state of a first control signal and on a state of a second control signal. The phase detector system is configured to receive a first clock, a second clock, and a control signal defining a plurality of states including a first state and a second state. The phase detector system is further configured to provide the first control signal and the second control signal each having a state based on a phase difference between the first and second clocks when the control signal has the first state, and to provide the first control signal and second control signal each having a state asynchronously controlled by the control signal when the control signal has the second state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.