Idle-pattern output control circuit used in a Gigabit Ethernet-passive optical network
US7274874B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2003 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Nov 17, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2011/0094
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An idle pattern output-control circuit used in a point-to-multipoint communication based Gigabit Ethernet-passive optical network (GE-PON) is provided. In a GE-PON having an optical-line terminal (OLT), a plurality of optical-network units (ONUs) connected to each other via an optical-distribution network (ODN), a media-access controller (MAC), and a physical-coding sublayer (PCS), in which the PCS transmits idle-pattern data to a serializer/deserializer (SERDES) when there is no data to be transmitted to the OLT, an idle-pattern output-control circuit comprising a data converter for converting an idle-pattern data generated from the PCS into a low-level optical signal for subsequent transmission to the OLT, and a switching circuit for selecting data generated from the PCS for subsequent transmission to the SERDES when there is data to be transmitted and for selecting data converted by the data converter for subsequent transmission to the SERDES when there is no data to be transmitted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.