Method and system for maintaining a desired service level for a processor receiving excessive interrupts
US7275122B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2005 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | May 25, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for maintaining a desired service level for a processor receiving excessive interrupts. The method includes the operation of defining an interrupt processing period during which interrupts will be measured for a processor. The amounts of time spent by the processor during the interrupt processing period in interrupt context can be measured. Another operation is detecting an interrupt storm occurring for the processor based on the amounts of time spent by the processor in interrupt context. The interrupts received by the processor can then be restricted for a period of the processor's total processing time when an interrupt storm has been detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.