Software verification method for control units and verification system
US7275184B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2002 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Nov 9, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B2219/24061
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for the verification of software functions for a control unit, using a simulation model to simulate the software functions and the control unit, the software code for the software functions being generated automatically from the identical simulation model, firstly for a first experimental control unit and secondly for a second standard control unit, identical input variables for the software functions being used on both control units and the output variables of both control units resulting therefrom being detected synchronized in time, i.e., simultaneously, the software functions being verified through comparison of the output variables of both control units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.