Runtime reconfiguration of reconfigurable circuits
US7275196B2 · kind B2 · utility
3Cited by
30References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 23, 2005 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Mar 22, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reconfigurable circuit having primary function blocks with runtime built-in self-test (BIST) circuitry, one or more redundant function blocks and runtime reconfiguration logic is described herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.