Methods to gather and display pin congestion statistics using graphical user interface
US7275230B2 · kind B2 · utility
7Cited by
2References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2004 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | May 12, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is a method for collecting, analyzing, and displaying statistics regarding block pin placement prior to routing of an integrated circuit. The statistics are graphically displayed in a graphical user interface (GUI). The GUI graphically displays indications of where block pin congestion problems lie, which allows an integrated circuit designer to quickly pinpoint and correct pin placement in areas of pin congestion to alleviate congestion in these areas prior to routing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.