Magnetic memory device, sense amplifier circuit and method of reading from magnetic memory device
US7277320B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2004 |
| Grant date | Oct 2, 2007 |
| Priority date | — |
| Expiry date | Sep 25, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/10
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A magnetic memory device and a sense amplifier circuit capable of obtaining a read signal output with a high S/N ratio and reducing power consumption and a circuit space, and a method of reading from a magnetic memory device are provided. In a sense amplifier, transistors (41A), (41B) which are differential amplifiers are commonly connected to one constant current circuit (50) through switches (46) ( . . . , 46n, 46n+1, . . . ). Corresponding bit decode lines (20) ( . . . , 20n, 20n+1, . . . ) and a read selection signal line (90) are connected to the switches (46) ( . . . , 46n, 46n+1, . . . ). A read/write signal is transferred from the read selection signal line (90), and the switches (46) operate according to a bit decode value and the read/write signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.