Smart memory read out for power saving
US7277340B2 · kind B2 · utility
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4References
41Claims
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Assignee
Inventor
Key dates
| Filing date | Jun 25, 2004 |
| Grant date | Oct 2, 2007 |
| Priority date | — |
| Expiry date | Apr 15, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and a circuit are given, to implement and realize power saving Sense Electronics Endowed (SEE) memory using modified memory read cycles, named as Smart Memory Readout (SMR). In an SMR-mode read cycle, the memory is only active a small fraction of a clock cycle thus saving power. In this small fraction where the memory is enabled by SMR-mode read, the memory content is read to a shadow register and held until read by the microcontroller. Said circuit and method are designed in order to be implemented with a very economic number of components, capable to be realized with modern integrated circuit technologies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.