Method and system for hard failure repairs in the field
US7277346B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2004 |
| Grant date | Oct 2, 2007 |
| Priority date | — |
| Expiry date | Dec 14, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor system and method for repairing failures of a packaged integrated circuit system are provided. The method includes detecting a failure associated with a packaged integrated circuit system after the packaged integrated circuit system is packaged, and repairing the failure by activating a redundancy circuit in the packaged integrated circuit system and deactivating a defective circuit associated with the failure. The process for repairing the failure includes applying a repair voltage to a polysilicon fuse to change a conductivity state of the polysilicon fuse from a first state to a second state. In another embodiment, the polysilicon fuse is replaced by a metal fuse, an anti-fuse, or a non-volatile random access memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.