High-speed router switching architecture
US7277425B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 21, 2002 |
| Grant date | Oct 2, 2007 |
| Priority date | — |
| Expiry date | Aug 3, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5679
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A high-speed router and method for operation of the core of such a router are disclosed. The disclosure describes switching packet data through a router core serving core ingress and egress ports. The router maintains at least one always-up ingress serial link from each core ingress port to the router core, and at least one always-up egress serial link from the router core to each core egress port. For each core ingress port, packet data is serialized prior to introduction to the router core and then transmitted to the core over that port's ingress serial link. Each core egress port receives a serialized data stream from the router core, which is then deserialized. Within the router core, the serialized data received on each ingress serial link is deserialized into a clocked digital data stream. The digital data streams are switched through a reconfigurable digital switch, reserialized, and transmitted over the egress serial links.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.