Maximum likelihood sequence estimator which computes branch metrics in real time
US7277506B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2000 |
| Grant date | Oct 2, 2007 |
| Priority date | — |
| Expiry date | Dec 22, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03197
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An improved method and apparatus for Viterbi Algorithm calculations for maximum likelihood sequence estimators in communication receivers is disclosed. The calculations for the maximum likelihood sequence estimator, in accordance with the invention, utilizes a variant of the Viterbi algorithm developed by Ungerboeck in which the associated branch metric calculations for the trellis require the computation of a set of branch metric parameters. An embodiment of the present invention provides for an improved recursive method and apparatus for calculation of the branch metric parameters that reduces the number of processor clock cycles required per state metric calculation. This enables real time computation of the branch metric parameters during execution of the Viterbi Algorithm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.