Low-jitter charge-pump phase-locked loop
US7277518B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2003 |
| Grant date | Oct 2, 2007 |
| Priority date | — |
| Expiry date | Dec 7, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase-locked loop includes a voltage-controlled oscillator and a charge-pump loop filter. The voltage-controlled oscillator includes a varactor having a first set of capacitor cells configured to adjust a capacitance based on a first control voltage, and a second set of capacitor cells configured to adjust a capacitance based on a second control voltage. The charge-pump loop filter receives a first and a second update signal, each having at least one state based on a phase difference between a first clock and a second clock, and comprises a first component and a second component. The first component is configured to adjust, during an update period, a voltage across an impedance from a reference level based on the states of the first and second update signals and to return the voltage across the impedance to the reference level prior to an end of the update period, wherein the voltage across the impedance comprises the first control voltage. The second component is configured to adjust a voltage across a capacitor based on the states of the first and second input signals, wherein the voltage across the capacitor comprises the second control voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.