Battery-optimized system-on-a-chip and applications thereof
US7278119B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2003 |
| Grant date | Oct 2, 2007 |
| Priority date | — |
| Expiry date | Apr 28, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A battery-optimized system-on-a-chip includes multimedia module, a high-speed interface, a processing module, on-chip memory, and an on-chip DC-to-DC converter. The multimedia module operably coupled to produce rendered output data from input data received via the high-speed interface and/or from data stored in the on-chip memory. The high-speed interface is operably coupled to provide data to and from an external source. The on-chip memory is operably coupled to store at least a portion of a multimedia application, wherein the processing module processes input multimedia data in accordance with the multimedia application to produce output multimedia data. The on-chip DC-to-DC converter is operably coupled to convert a battery voltage into a supply voltage that is provided to the multimedia module, the high-speed interface, the processing module, and/or the on-chip memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.