Method for fabricating cell transistor of flash memory
US7279381B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 12, 2005 |
| Grant date | Oct 9, 2007 |
| Priority date | — |
| Expiry date | Sep 4, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/30
Abstract
A method for fabricating a cell transistor of a flash memory including a device isolation film is disclosed, to prevent the mouse bite and the residue of a gate electrode, which includes the steps of forming a moat pattern of STI structure on a semiconductor substrate; forming a shallow trench by etching the semiconductor substrate exposed by the moat pattern; forming a gap-fill insulating layer in the shallow trench by HDP; forming the device isolation film of STI structure in the shallow trench by etching the gap-fill insulating layer with CMP; forming a flash cell pattern for opening an area for flash memory cell transistor in the semiconductor substrate; and removing the flash cell pattern and the moat pattern after etching the upper surface of the device isolation film in the area being opened by the flash cell pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.