xB/yB coder programmed within an embedded array of a programmable logic device
US7279928B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 4, 2005 |
| Grant date | Oct 9, 2007 |
| Priority date | — |
| Expiry date | Feb 3, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4908
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A programmable logic device (PLD) with logic blocks and an embedded array block includes an x-bit (xB)/y-bit (yB) coder programmed into the embedded array block instead of into the logic blocks. An xB/yB coder programmed into an embedded array block of a PLD instead of into logic blocks utilizes less space in a PLD than an xB/yB encoder programmed into the logic blocks. Additionally, the xB/yB coder can operate without row or column crossing for efficient timing in high-speed applications. In an embodiment, the xB/yB coder is an 8B/10B coder. In a further embodiment, the 8B/10B coder comprises a 5B/6B encoder and a 3B/4B encoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.