Digital frequency locked loop and phase locked loop frequency synthesizer
US7279988B1 · kind B1 · utility
15Cited by
20References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2005 |
| Grant date | Oct 9, 2007 |
| Priority date | — |
| Expiry date | Sep 1, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency synthesizer including frequency and phase locked loop that operates in either a frequency locked loop (FLL) mode or a phase locked loop (PLL) mode. In a first state, the frequency and phase locked loop operates in the FLL mode for initial frequency acquisition. Once the frequency and phase locked loop has locked in FLL mode, the frequency and phase locked loop transitions to the PLL mode for normal operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.