Pulse metering architecture
US7280062B2 · kind B2 · utility
1Cited by
4References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2005 |
| Grant date | Oct 9, 2007 |
| Priority date | — |
| Expiry date | Dec 2, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M15/00
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a subscriber line interface circuit includes circuitry to generate metering pulses for insertion onto a subscriber line. The circuitry includes a cascaded digital-to-analog converter (DAC) structure including a first DAC to convert a digital sine wave into an analog representation, a second DAC to multiply the analog representation with a ramp value to obtain an unscaled output, and a third DAC to multiply the unscaled output with a gain value to generate a metering pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.