Single-loop switched-capacitor analog-to-digital sigma-delta converter
US7280066B2 · kind B2 · utility
5Cited by
7References
25Claims
0Family size
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Key dates
| Filing date | Jun 9, 2006 |
| Grant date | Oct 9, 2007 |
| Priority date | — |
| Expiry date | Jun 9, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/424
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A single-loop differential switched-capacitor sigma-delta converter has a three stage double-sampling architecture with reduced current consumption. The converter is stable for large input dynamics, which makes it suitable for RF applications. The three-stage multi-bit double-sampled architecture has a single-loop architecture in which all integrators are included in a same feedback loop. This has been made possible based upon the type of integrators that are connected in cascade. Functioning of the converter is less sensitive to nonlinearities of the operational amplifiers of the integrators.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.