Integrated electronic circuit comprising a capacitor and a planar interference inhibiting metallic screen
US7282803B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 2003 |
| Grant date | Oct 16, 2007 |
| Priority date | — |
| Expiry date | May 6, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/906
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic circuit includes a substrate. A capacitor and at least one semiconductor component are supported by a surface of the substrate. A substantially planar screen, oriented parallel to the surface of the substrate and made of metallic material, is placed between the capacitor and the semiconductor component. Preferably, the semiconductor component is placed in proximity to the surface of the substrate and several superposed layers of insulating material cover the surface of the substrate and the semiconductor component. The capacitor is then placed within at least one layer of insulating material above the semiconductor component, and the screen is placed within an intermediate layer of insulating material between the layer incorporating the capacitor and the surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.