Circuit simulation bus transaction analysis
US7283944B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2003 |
| Grant date | Oct 16, 2007 |
| Priority date | — |
| Expiry date | Oct 3, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
While simulating a circuit described by the netlist, a circuit simulator produces a dump file containing a set of waveform data sequences, each corresponding to a separate signal within the circuit, and representing states of its corresponding signal at a succession of times during the circuit simulation. Based on a mapping of the waveform data sequences to lines of a bus, and on transaction data models describing characteristic signal patterns appearing on the bus during each type of transaction that can occur on the bus, a transaction analysis system identifies transactions that occurred on the bus during the simulation. The transaction analysis system also notes a time during the circuit simulation in which each transaction occurred, and generates a display including a separate representation of each identified transaction positioned to represent the time the transaction occurred.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.