ROM scan memory expander
US7284084B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2004 |
| Grant date | Oct 16, 2007 |
| Priority date | — |
| Expiry date | Dec 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for booting up multiple PCI peripheral devices, such that the number of bootable PCI peripheral devices is not limited by the amount of computer system memory that is dedicated to storing executable boot code for the peripheral devices. The executable boot code is stored on a Read Only Memory (ROM) on each peripheral device. When a new PCI peripheral device begins to boot up, a check for available memory space in a ROM scan memory address space is performed. If there is not enough available room in the ROM scan memory address space for the new device's executable boot code, then a ROM scan detection logic pages an image of another peripheral device's executable boot code out of the ROM scan memory address space before storing the new device's executable boot code into the ROM scan memory address space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.