Patent · US Expired

Method for testing a chip with a package and for mounting the package on a board

US7284321B2 · kind B2 · utility

0Cited by

9References

19Claims

0Family size

Assignee

Micronas GmbH · DE

Inventors

Wolfgang Hauser · Blankenloch, DE
Heiko Dreher · Nassau (Lahn), DE
Christian Kimstedt · Glückstadt, DE
Markus Rogalla · Bad Krozingen, DE

Key dates

Filing date	May 17, 2005
Grant date	Oct 23, 2007
Priority date	—
Expiry date	Aug 27, 2025

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY10T29/49222
WIPO fieldAudio-visual technology
WIPO sectorElectrical engineering

Abstract

A method for testing a chip with a package having connecting pins and mounting the package on a board combines the advantages of a package with inline connecting pins with that of a package with offset connecting pins. The package with inline connecting is inserted into a socket for testing. Before mounting on the board, at least one connecting pin, preferably every second connecting pin, of the package is bent inward by a bending tool to achieve an offset arrangement of the connecting pins. The package is preferably mounted on the board using the bending tool. Since every second connecting pin is not bent inward immediately before insertion of the connecting pins, no subsequent corrective alignment of the offset connecting pins is required.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.