Method and apparatus for multiplexing an integrated circuit pin
US7285980B2 · kind B2 · utility
9Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2005 |
| Grant date | Oct 23, 2007 |
| Priority date | — |
| Expiry date | Sep 23, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1732
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system and method for multiplexing an integrated circuit pin include a plurality of registers for storing bit values; a plurality of functions to be multiplexed on receiving the bit values; a decoding logic for decoding the bit values for selecting at least one of the functions; a plurality of pads connected to the plurality of functions and the decoding logic; and external pin/pins acting as inputs/outputs for the selected functionality depending upon the bit values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.