Low-power, p-channel enhancement-type metal-oxide semiconductor field-effect transistor (PMOSFET) SRAM cells
US7286389B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2005 |
| Grant date | Oct 23, 2007 |
| Priority date | — |
| Expiry date | Jul 21, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/903
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Low-power, all-p-channel enhancement-type metal-oxide semiconductor field-effect transistor (PMOSFET) SRAM cells are disclosed. A PMOSFET SRAM cell is disclosed. The SRAM cell can include a latch having first and second PMOSFETs for storing data. Further, a gate of the first PMOSFET is connected to a drain of the second PMOSFET at a first memory node. A gate of the second PMOSFET is connected to a drain of the first PMOSFET at a second memory node. The SRAM cell can also include third and fourth PMOSFETs forming a pull-down circuit. A source of the third PMOSFET is connected to the first memory node. Further, a source of the fourth PMOSFET is connected to the second memory node. The SRAM cell can include access circuitry for accessing data at the first and second memory nodes for read or write operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.