Method for programming a routing layout design through one via layer
US7287320B2 · kind B2 · utility
194Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2004 |
| Grant date | Oct 30, 2007 |
| Priority date | — |
| Expiry date | Jun 15, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49194
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for programming a routing layout design through one via layer includes forming a plurality of metal traces on a first routing layer and a second routing layer, and positioning a plurality of vias within a via layer disposed between the first and second routing layers for connecting the metal traces on the first and second routing layers according to a first current route defined by a predetermined circuit layout design to connect a first node and a second node so as to establish a second current route equivalent to the first current route.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.