Semiconductor device
US7288816B2 · kind B2 · utility
4Cited by
2References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2006 |
| Grant date | Oct 30, 2007 |
| Priority date | — |
| Expiry date | Apr 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to a semiconductor device of an embodiment of the present invention, a P-type buried diffusion layer is formed across a substrate and an epitaxial layer. An N-type buried diffusion layer is formed in the P-type buried diffusion layer. An overvoltage protective PN junction region is formed below an element formation region. A breakdown voltage of the PN junction region is lower than a source-drain breakdown voltage. This structure prevents a breakdown current from concentratedly flowing into the PN junction region and protects the semiconductor device from overvoltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.