Memory module decoder
US7289386B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2005 |
| Grant date | Oct 30, 2007 |
| Priority date | — |
| Expiry date | Jul 22, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory module connectable to a computer system includes a printed circuit board, a plurality of memory devices coupled to the printed circuit board, and a logic element coupled to the printed circuit board. The plurality of memory devices has a first number of memory devices. The logic element receives a set of input control signals from the computer system. The set of input control signals corresponds to a second number of memory devices smaller than the first number of memory devices. The logic element generates a set of output control signals in response to the set of input control signals. The set of output control signals corresponds to the first number of memory devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.